• Fichier: cx16-bank.cfg
  • Path: /invader_nes/InvaderNES/build/cc65/cfg/cx16-bank.cfg
  • File size: 7.28 KB
  • MIME-type: text/plain
  • Charset: utf-8
 
Retour
FEATURES {
    STARTADDRESS: default = $0801;
}
SYMBOLS {
    __LOADADDR__:     type = import;
    __EXEHDR__:       type = import;
    __BANKRAMADDR__:  type = import;
    __STACKSIZE__:    type = weak,   value = $0800; # 2K stack
    __HIMEM__:        type = weak,   value = $9F00;
    __BANKRAMSTART__: type = export, value = $A000;
    __BANKRAMSIZE__:  type = weak,   value = $2000; # 8K banked RAM
}
MEMORY {
    ZP:         file = "", define = yes,  start = $0022,                size = $0080 - $0022;
    LOADADDR:   file = %O,                start = %S - 2,               size = $0002;
    HEADER:     file = %O, define = yes,  start = %S,                   size = $000D;
    MAIN:       file = %O, define = yes,  start = __HEADER_LAST__,      size = __HIMEM__ - __HEADER_LAST__;
    BSS:        file = "",                start = __ONCE_RUN__,         size = __HIMEM__ - __ONCE_RUN__ - __STACKSIZE__;
#   BRAM00ADDR: file = "%O.00",           start = __BANKRAMSTART__ - 2, size = $0002;
#   BRAM00:     file = "%O.00",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM01ADDR: file = "%O.01",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM01:     file = "%O.01",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM02ADDR: file = "%O.02",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM02:     file = "%O.02",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM03ADDR: file = "%O.03",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM03:     file = "%O.03",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM04ADDR: file = "%O.04",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM04:     file = "%O.04",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM05ADDR: file = "%O.05",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM05:     file = "%O.05",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM06ADDR: file = "%O.06",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM06:     file = "%O.06",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM07ADDR: file = "%O.07",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM07:     file = "%O.07",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM08ADDR: file = "%O.08",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM08:     file = "%O.08",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM09ADDR: file = "%O.09",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM09:     file = "%O.09",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM0AADDR: file = "%O.0a",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM0A:     file = "%O.0a",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM0BADDR: file = "%O.0b",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM0B:     file = "%O.0b",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM0CADDR: file = "%O.0c",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM0C:     file = "%O.0c",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM0DADDR: file = "%O.0d",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM0D:     file = "%O.0d",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM0EADDR: file = "%O.0e",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM0E:     file = "%O.0e",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
    BRAM0FADDR: file = "%O.0f",           start = __BANKRAMSTART__ - 2, size = $0002;
    BRAM0F:     file = "%O.0f",           start = __BANKRAMSTART__,     size = __BANKRAMSIZE__;
}
SEGMENTS {
    ZEROPAGE:   load = ZP,         type = zp;
    EXTZP:      load = ZP,         type = zp,                optional = yes;
    LOADADDR:   load = LOADADDR,   type = ro;
    EXEHDR:     load = HEADER,     type = ro;
    STARTUP:    load = MAIN,       type = ro;
    LOWCODE:    load = MAIN,       type = ro,                optional = yes;
    CODE:       load = MAIN,       type = ro;
    RODATA:     load = MAIN,       type = ro;
    DATA:       load = MAIN,       type = rw;
    INIT:       load = MAIN,       type = rw;
    ONCE:       load = MAIN,       type = ro,  define = yes;
    BSS:        load = BSS,        type = bss, define = yes;
#   BRAM00ADDR: load = BRAM00ADDR, type = ro,                optional = yes;
#   BANKRAM00:  load = BRAM00,     type = rw,  define = yes, optional = yes;
    BRAM01ADDR: load = BRAM01ADDR, type = ro,                optional = yes;
    BANKRAM01:  load = BRAM01,     type = rw,  define = yes, optional = yes;
    BRAM02ADDR: load = BRAM02ADDR, type = ro,                optional = yes;
    BANKRAM02:  load = BRAM02,     type = rw,  define = yes, optional = yes;
    BRAM03ADDR: load = BRAM03ADDR, type = ro,                optional = yes;
    BANKRAM03:  load = BRAM03,     type = rw,  define = yes, optional = yes;
    BRAM04ADDR: load = BRAM04ADDR, type = ro,                optional = yes;
    BANKRAM04:  load = BRAM04,     type = rw,  define = yes, optional = yes;
    BRAM05ADDR: load = BRAM05ADDR, type = ro,                optional = yes;
    BANKRAM05:  load = BRAM05,     type = rw,  define = yes, optional = yes;
    BRAM06ADDR: load = BRAM06ADDR, type = ro,                optional = yes;
    BANKRAM06:  load = BRAM06,     type = rw,  define = yes, optional = yes;
    BRAM07ADDR: load = BRAM07ADDR, type = ro,                optional = yes;
    BANKRAM07:  load = BRAM07,     type = rw,  define = yes, optional = yes;
    BRAM08ADDR: load = BRAM08ADDR, type = ro,                optional = yes;
    BANKRAM08:  load = BRAM08,     type = rw,  define = yes, optional = yes;
    BRAM09ADDR: load = BRAM09ADDR, type = ro,                optional = yes;
    BANKRAM09:  load = BRAM09,     type = rw,  define = yes, optional = yes;
    BRAM0AADDR: load = BRAM0AADDR, type = ro,                optional = yes;
    BANKRAM0A:  load = BRAM0A,     type = rw,  define = yes, optional = yes;
    BRAM0BADDR: load = BRAM0BADDR, type = ro,                optional = yes;
    BANKRAM0B:  load = BRAM0B,     type = rw,  define = yes, optional = yes;
    BRAM0CADDR: load = BRAM0CADDR, type = ro,                optional = yes;
    BANKRAM0C:  load = BRAM0C,     type = rw,  define = yes, optional = yes;
    BRAM0DADDR: load = BRAM0DADDR, type = ro,                optional = yes;
    BANKRAM0D:  load = BRAM0D,     type = rw,  define = yes, optional = yes;
    BRAM0EADDR: load = BRAM0EADDR, type = ro,                optional = yes;
    BANKRAM0E:  load = BRAM0E,     type = rw,  define = yes, optional = yes;
    BRAM0FADDR: load = BRAM0FADDR, type = ro,                optional = yes;
    BANKRAM0F:  load = BRAM0F,     type = rw,  define = yes, optional = yes;
}
FEATURES {
    CONDES: type    = constructor,
            label   = __CONSTRUCTOR_TABLE__,
            count   = __CONSTRUCTOR_COUNT__,
            segment = ONCE;
    CONDES: type    = destructor,
            label   = __DESTRUCTOR_TABLE__,
            count   = __DESTRUCTOR_COUNT__,
            segment = RODATA;
    CONDES: type    = interruptor,
            label   = __INTERRUPTOR_TABLE__,
            count   = __INTERRUPTOR_COUNT__,
            segment = RODATA,
            import  = __CALLIRQ__;
}